FreePDK 45nm: A Variation-Aware

Design Kit for 45nm

Oklahoma State University has been closely involved in the development of the variation aware open-source FreePDK 45nm effort, developing the Standard Cell library and the full-chip SoC Design flow.

The creation and characterization of the standard cells was performed using Cadabra from Synopsys and SignalStorm and Abstract Generator from Cadence to facilitate and automate the process as much as possible. Cadabra outputs a DRC error free gds layout of the cells while SignalStorm provides timing characterization. Abstract Generator handles geometric characterization of the cells for place and route.

The following pages present some descriptions about the development of the Library, the software utilized and a tutorial of the design flow with a reference design.

• Oklahoma State University FreePDK 45nm System on Chip Library:
  • Description
  • Characterization Data: (HTML)

• Library Development:
  • Use with Synopsys' Cadabra
  • CDS SignalStorm Characterization
  • Abstract Generation

• Full chip SoC Design flow tutorials
  • Synthesis with Cadence RTL Compiler, Synopsys Design Compiler and Cadence Build Gates
  • Place and Route with Cadence Encounter SoC

Installation instructions for the design flow and standard cell library kit can be found in our Wiki site here.