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Revision History

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Version 2.5 (6/12/2007)

• Library
  • Added Synopsys Astro support allowing complete front-end/back-end vendor design (i.e. Synopsys or Cadence)
  • Segmented into two separated directories
  • Added System on Chip macro-routing for standard-cell/custom-cell designs
  • Now labeled as osu_soc flow.

• Flow Scripts
  • Added Tcl scripts to Synopsys through dc-transcript

• Reference Designs
  • Added example System on Chip design

• Documentation
  • Revamped http://www.chiptalk.org
  • Added Wiki at http://vcag.ecen.okstate.edu/wiki and started migration.

Version 2.4 (7/11/2005)

• Library
  • Library: No modifications, identical to v2.3
  • Flow: Removed all hard-coded path names

• Flow Scripts
  • New variable: $OSUcells to aid in setup. See flow/README.install.

• Reference Designs
  • No changes

Version 2.3 (6/19/2005)

• Library
  • Migrated from IIT to OSU library
  • Added "functional", "abstract" views for Virtuoso
  • Added pins to the Virtuoso cell library
  • Updated Encounter flow to support versions 3.3 and 4.1
  • Updated BGX flow to SDC Version 1.4
  • Separated designs into three downloads for better download utilization

• Flow Scripts
  • No changes

• Reference Designs
  • No changes

Version 2.2 (12/7/2004)

• Library
  • No changes

• Flow Scripts
  • added hdl_multi_line_port_map false to compile_bgx.scr
  • added Verilog and VHDL simulation files to "/flow"
  • changed "grep" to "/usr/bin/grep" in bgx compile script

• Reference Designs
  • Added MIPS single-cycle and multi-cycle reference designs

Version 2.1 (9/13/2004)

• Library
  • Many bug fixes in the schematics

• Flow Scripts
  • Template script for Primetime added (primetime.scr)
  • Flow now automatically creates Virtuoso Layout and Schematic
  • Added flow for use with Synopsys' PowerMill and PathMill

• Reference Designs
  • New directory structure, separates Encounter and Silicon Ensemble reference designs
  • Used Design Compiler for all reference designs, which is probably the most popular Synthesis tool
  • All designs now include a schematic
  • Perl Scripts to generate Array and Tree multipliers of any size

Version 2.0 (7/31/2004)

• Library
  • Switched to Signalstorm 3.2
  • Added 0.35u process
  • Fixed grid to lambda/2
  • Added async flops
  • Changed to DBUU 1000
  • Added stacked vias

• Flow Scripts
  • Added Encounter flow scripts
  • Switched to Silicon Ensemble 5.4

• Reference Designs
  • Implemented NRD design on all processes with all flows

Version 1.0

• Included 0.5, 0.25, 0.18
• No stacked vias
• No async flops
• DBUU was 100
• No manufacturing grid

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Created by Johannes Grad