VLSI and Standard Cell Links

VLSI Links

• Magic, very powerfull and free layout tool
• New Version of Magic from Tim Edwards
• The Mosis PDK for Cadence from NCSU
• The MOSIS fabrication service
• The Chiptalk.org VLSI Forum

More Standard Cells

• From Cadence: A generic 0.18um library complete with 1-port RAM, 2-port RAM and ROM compilers: http://crete.cadence.com
• The TSMC 0.25um cell library by Virginia Tech distribution. The 0.25um libaries we have are different than these, because we utilize SCN5M_SUBM rules and these use SCN5M_DEEP rules. In addition, Professor Ha's cells have different charateristics than ours. Both are useful, however, you can choose the one you like the best. We have both because we believe both are good. To obtain these cells please go to http://www.ee.vt.edu/~ha.
• A low-power library for AMI 0.5um from the University of Tennessee: http://www-ece.engr.utk.edu/ece/bouldin_courses/ut-lp-ami06.html
• A small release by Mississippi State: http://www.erc.msstate.edu/mpl/education/cadence/standard_cell/introduction.html
• A generic 0.13um library and a survey of other libraries: www.vlsitechnology.org
• Soon to-be released 0.18um library from Carnegie Mellon http://www.ece.cmu.edu/~sandbox

Testing

A low-cost functional tester is available for digital VLSI chips. It is an excellent system designed for University and Commerical firms requiring quick seamless testing. The cells have been verified with this system and is highly recommended. To order or obtain more information, go to the following URL: http://www.onehotlogic.com/

Other OSU Links

• OSU Cells Mailing list
• OSU Padframe
• OSU's Cadence Suport Page
• ChipTalk